Creating detailed computer models of quantum chips helps scientists predict how they will behave before they begin manufacturing. This approach allows researchers to catch potential problems early and ensure that the design performs as expected. At Berkeley Lab, Applied Mathematics and Computational Research (AMCR) Division Quantum Systems Accelerator (QSA) researchers Zhi Jackie Yao and Andy Nonaka are building advanced electromagnetic simulations to support the development of the next generation of quantum hardware.
“The computational model predicts how design decisions will affect electromagnetic wave propagation within the chip. This ensures proper signal coupling and avoids unnecessary crosstalk,” said Nonaka.
To carry out this research, the team used the exascale modeling tool ARTEMIS to simulate and refine a quantum chip developed through collaboration with Irfan Siddiqi’s Quantum Nanoelectronics Laboratory at the University of California, Berkeley, and Berkeley Lab’s Advanced Quantum Testbed (AQT). Yao will present this research at a technology demonstration at the International Conference on High Performance Computing, Networking, Storage, and Analytics (SC25).
Quantum chip design combines elements of microwave engineering with the complexities of cryogenic physics. For this reason, classical electromagnetic simulation platforms like ARTEMIS, originally developed under the DOE’s Exascale Computing Project, are well suited for studying these systems.
Large supercomputers work on tiny chips
Not all simulations require extreme computing resources, but this project pushed the envelope. To capture the details of the highly complex chip, the team relied on the near full power of the Perlmutter supercomputer. They spent 24 hours using almost all 7,168 NVIDIA GPUs to model a multilayer chip just 10 millimeters in diameter, 0.3 millimeters thick, and with features down to 1 micron.
“I don’t know of anyone who has done physical modeling of microelectronic circuits at full scale on a Perlmutter system. We were using close to 7,000 GPUs,” Nonaka says. “We discretized the chip into 11 billion grid cells. We were able to perform over one million time steps in seven hours and evaluate three circuit configurations in Perlmutter within a day. These simulations would not have been possible in this time frame without the complete system.”
This level of precision makes your work stand out. Many simulations simplify the chip as a “black box” due to limited computing power, but by having access to thousands of GPUs, the researchers were able to model the actual physical structure and behavior of the device.
“We’re doing a full-wave physical-level simulation, which means we’re paying attention to the materials we use on the chip, the layout of the chip, how the metal is routed, the niobium and other types of metal lines, how we make the resonators, the size, the shape, and the materials we use,” Yao said. “We value physical details and incorporate them into our models.”
Beyond the structural details, the simulation also reproduces how the chip would behave during a real experiment, including how the qubits interact with each other and the rest of the circuit.
Capturing real-time quantum behavior
By combining detailed physical modeling and time-based simulations, the researchers achieved something unusual. Their approach uses Maxwell’s equations in the time domain, takes into account nonlinear effects, and allows you to track how the signal changes.
Yao said the combination of these characteristics, with an emphasis on physical chip design and the ability to simulate in real-time, is part of what made this simulation unique. “This combination is beneficial because it uses partial differential equations, Maxwell’s equations, and runs in the time domain so that nonlinear behavior can be incorporated. All of this adds up to unique capabilities.”
This project was supported by NERSC through the Quantum Information Science @ Perlmutter program, which allocates computing time to promising quantum research activities. Among the programs, this simulation stood out in its scale and ambition.
“This effort stands out as one of the most ambitious quantum projects at Perlmutter to date, leveraging the computing power of ARTEMIS and NERSC to capture more than four orders of magnitude of quantum hardware detail,” said Katie Klymko, a NERSC quantum computing engineer who worked on the project.
Next steps in quantum chip modeling
Looking forward, the team plans to expand the simulations to more accurately understand the chip and how it behaves within large-scale systems.
“We would like to do more quantitative simulations so that we can do post-processing to quantify the spectral behavior of the system,” Yao said. “We want to see how the qubit resonates with the rest of the circuit. In the frequency domain, we want to be even more confident that our simulations are quantitatively correct compared to other frequency-domain simulations.”
Finally, the model is tested against reality. Once the chip is manufactured and experimentally evaluated, researchers compare the results with predictions and refine the simulations accordingly.
Yao and Nonaka emphasized that this achievement relies on close collaboration across Berkeley Lab and its partners, including AMCR, QSA, AQT, and NERSC, which provide both computing power and technical expertise. According to QSA Director Bart de Jong, this initiative represents an important step forward.
“This unprecedented simulation, made possible by a broad partnership of scientists and engineers, is an important step forward in accelerating the design and development of quantum hardware,” he said. “More powerful and better performing quantum chips will unlock new capabilities for researchers and open new avenues for science.”
